OmpSs-2@FPGA User Guide

The information included in this document is provided “as is”, with no warranties whatsoever, including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample. The document is not guaranteed to be complete and/or error-free at this stage and it is subject to changes without furthernotice. Barcelona Supercomputing Center will not assume any responsibility for errors or omissions in this document. Please send comments, corrections and/or suggestions to ompss-fpga-support at bsc.es. This document is provided for informational purposes only.

Note

There is a PDF version of this document at http://pm.bsc.es/ftp/ompss-2-at-fpga/doc/user-guide-3.0.0/OmpSs2FPGAUserGuide.pdf

• 1. Install OmpSs-2@FPGA toolchain
  • 1.1. Prerequisites
    • 1.1.1. Git Large File Storage
    • 1.1.2. Vendor backends - Xilinx Vivado
  • 1.2. Stable release
  • 1.3. Individual git repositories
    • 1.3.1. Accelerator Integration Tool (AIT)
    • 1.3.2. Kernel module
    • 1.3.3. XDMA
    • 1.3.4. xTasks
    • 1.3.5. Nanos6-fpga
    • 1.3.6. LLVM/Clang
• 2. Develop OmpSs-2@FPGA programs
  • 2.1. Limitations
  • 2.2. Specific differences in clauses and directives in Ompss@FPGA VS OmpSs
  • 2.3. Clauses of task directive
    • 2.3.1. num_instances
    • 2.3.2. affinity
    • 2.3.3. copy_in/out
    • 2.3.4. copy_deps
  • 2.4. Calls to Nanos6 API
    • 2.4.1. Nanos6 FPGA Architecture API
• 3. Compile OmpSs-2@FPGA programs
  • 3.1. LLVM/Clang FPGA Phase options
    • 3.1.1. fompss-fpga
    • 3.1.2. fompss-fpga-dump
    • 3.1.3. fompss-fpga-hls-tasks-dir
    • 3.1.4. fompss-fpga-instrumentation
    • 3.1.5. fompss-fpga-mercurium
    • 3.1.6. fompss-fpga-mercurium-flags
    • 3.1.7. fompss-fpga-ait
    • 3.1.8. fompss-fpga-ait-flags
    • 3.1.9. fompss-fpga-extract
    • 3.1.10. fompss-fpga-wrapper-code
    • 3.1.11. fompss-fpga-memory-port-width
    • 3.1.12. fompss-fpga-check-limits-memory-port
  • 3.2. AIT options
    • 3.2.1. AIT options
    • 3.2.2. Accelerator placement options
    • 3.2.3. Accelerator interconnect options
  • 3.3. Binaries
  • 3.4. Bitstream
    • 3.4.1. Shared memory port
  • 3.5. Boot Files
• 4. Running OmpSs-2@FPGA Programs
  • 4.1. Nanos6 FPGA Architecture options
    • 4.1.1. Nanos6 FPGA Architecture configuration
• 5. Create boot files for ultrascale
  • 5.1. Prerequisites
    • 5.1.1. Petalinux installation
  • 5.2. Petalinux project setup
    • 5.2.1. Unpack the bsp
    • 5.2.2. [Optional] Fix known problems in AXIOM-ZU9EG-2016.3 project
    • 5.2.3. [Optional] Modify the FSBL to have the Fallback system
    • 5.2.4. Configure petalinux
    • 5.2.5. Configure linux kernel
  • 5.3. Petalinux (2016.3) build for a custom hdf
    • 5.3.1. Add missing nodes to device tree
    • 5.3.2. Build the Linux system
    • 5.3.3. [Optional] Build PMU Firmware
    • 5.3.4. Create BOOT.BIN file
  • 5.4. Petalinux (2018.3) build for a custom hdf
    • 5.4.1. Add missing nodes to device tree
    • 5.4.2. Build the Linux system
    • 5.4.3. Create BOOT.BIN file
• 6. Cluster Installations
  • 6.1. Ikergune cluster installation
    • 6.1.1. General remarks
    • 6.1.2. Module structure
    • 6.1.3. Build applications
    • 6.1.4. Running applications
  • 6.2. Xaloc cluster installation
    • 6.2.1. General remarks
    • 6.2.2. Node specifications
    • 6.2.3. Logging into xaloc
    • 6.2.4. Module structure
    • 6.2.5. Build applications
    • 6.2.6. Running applications
  • 6.3. Quar cluster installation
    • 6.3.1. General remarks
    • 6.3.2. Node specifications
    • 6.3.3. Logging into quar
    • 6.3.4. Module structure
    • 6.3.5. Build applications
    • 6.3.6. Running applications
  • 6.4. crdbmaster cluster installation
    • 6.4.1. General remarks
    • 6.4.2. System overview
    • 6.4.3. Logging into the system
    • 6.4.4. Module structure
    • 6.4.5. Build applications
    • 6.4.6. Running applications
  • 6.5. Llebeig cluster installation
    • 6.5.1. General remarks
    • 6.5.2. Module structure
    • 6.5.3. Build applications
• 7. FAQ: Frequently Asked Questions
  • 7.1. What is OmpSs-2?
  • 7.2. How to keep HLS intermediate files generated by Mercurium?
  • 7.3. Problems with structure/symbol redefinition in FPGA tasks
  • 7.4. Hide/change FPGA task code during Mercurium binary compilation
  • 7.5. Statically scheduling tasks to different task instances
  • 7.6. Remarks/Limitations

• Index