3.1. LLVM/Clang FPGA Phase options

The following sections list and summarize the LLVM/Clang options from the FPGA Phase.

Note

Do not forget the flag -fompss-2 in both compilation and linking stages of your application. Otherwise, your application will not be compiled with parallel support or not linked to the tasking runtime library.

3.1.1. fompss-fpga-wrapper-code

[Available in release 2.0.0]

Enables FPGA task extraction into independent HLS wrappers.

This option is mandatory when generating a bitstream.

clang++ -fompss-2 -fompss-fpga-wrapper-code \
  src/dotproduct.c -o dotproduct \
  -fompss-fpga-ait-flags "--board=alveo_u200 --name=dotproduct"

3.1.2. fompss-fpga-ait-flags

[Available in release 2.0.0]

String of whitespace-separated list of AIT flags that will be passed to the tool. Also enables AIT on the linking stage.

This option is mandatory when generating a bitstream.

clang++ -fompss-2 \
  src/dotproduct.c -o dotproduct \
  -fompss-fpga-ait-flags "--board=alveo_u200 --name=dotproduct"

3.1.3. fompss-fpga-memory-port-width

[Available in release 2.0.0]

Enables wide-port feature of OmpSs@FPGA.

Accelerator memory interfaces will be merged into a single wide-port of arbitrary power-of-2 size. Code inside the wrapper will be generated in order to pack and unpack local variables when reading and writing from memory.

clang++ -fompss-2 -fompss-fpga-memory-port-width 512 \
  src/dotproduct.c -o dotproduct \
  -fompss-fpga-ait-flags "--board=alveo_u200 --name=dotproduct"

3.1.4. fompss-fpga-check-limits-memory-port

[Available in release 2.0.0]

By default the compiler assumes that all the data that has to be copied to and from memory is multiple of the wide-port size.

This option adds checks inside the pack/unpacking code to manage copies smaller than the wide-port size.

clang++ -fompss-2 -fompss-fpga-check-limits-memory-port \
  src/dotproduct.c -o dotproduct \
  -fompss-fpga-ait-flags "--board=alveo_u200 --name=dotproduct"