OmpSs@FPGA

OmpSs-at-FPGA is an extension of OmpSs programming model to support easily offloading tasks to FPGA devices. It uses the task and target directives to define the portions of application code that will become accelerators in the FPGA. The supported languages are C and C++.

SOURCE CODE EXAMPLE

The following code shows an implementation of the dot product using an FPGA task.

COMPILATION

The tasks with target fpga device are isolated by OmpSs compiler (Mercurium) into separate files. These files are used by autoVivado tool to generate the FPGA bitstream. AutoVivado uses different TCL scripts to generate a project for the Xilinx tools that allows the OmpSs runtime (Nanos++) interact with the FPGA accelerators. The structure of the components involved in the application binary and FPGA bitstream generation are shown in the below figure.

EXECUTION

The execution of an OmpSs@FPGA application follows the same pattern of a regular OmpSs application. The runtime library (Nanos++), and some extra support libraries, must be available in the execution machine. Also, there is support for instrumenting the FPGA accelerators and integrate the information into the Extrae tool.

SUPPORTED BOARDS

Currently, we have tested the toolchain and successfully accelerated different OmpSs applications in the following boards:

  • Zynq-7000 Family
  • SECO AXIOM Board
  • Trenz Electronics Zynq U+

CONTACT

If you are interested in OmpSs@FPGA and want more information, do not hesitate to contact us or send an e-mail: pm-tools [at] bsc.es